Electrical Engineering › Section S · Logic gates and Boolean algebra › Topic S.2
Programmable and fixed-function gates: logic levels and noise margins
A gate on paper is ideal; a gate on a board has voltage limits, a delay, a power draw and a limit on what it can drive. This topic covers how programmable devices form gates, the 74-series families, the four voltage limits that define logic levels and noise margins, speed and power, fan-out, and how gates fail.
In this topic
- The programmable AND array
- Link technologies and programming
- Fixed-function gates and families
- Four voltage limits
- Noise margins
- Worked example: CMOS noise margins
- Worked example: a 3.3 V output into 5 V logic
- Speed and power
- Fan-out and unused inputs
- Troubleshooting gates
- Common mistakes to avoid
- Key takeaways
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